74191N 4-Bit Binary Counter IC circuit designed as a synchronous reversible up-down counter. 74191N comes with a 4-bit binary counter in which Synchronous operation provided by all flip-flops clocked simultaneously. As a result, the outputs change simultaneously as instructed by the steering logic. The output counting spikes generally associated with asynchronous (ripple clock) counters are eliminated in this mode of operation. If the enable input is low, the outputs of the four master-slave flip-flops are activated on a low-to-high level change of the clock input. Counting is prevented by a high enable input. Only while the clock input remains high is it possible to adjust the level of the enable or down-up inputs.
The direction of the count decided by the extent of the down-up input. When low, the counter counts up and when high it counts down. This counter made fully programmable that the outputs also preset to either level by placing a low on the load input and entering the specified data at the data inputs. The output will change independently of the extent of the clock input. This feature allows the counters to function as modulo-N dividers by simply modifying the count length with the preset inputs. The clock down up and load inputs buffered to lower the drive requirement. This significantly reduces the amount of clock drivers etc required for long parallel words.
Two outputs made available to perform the cascading function ripple clock and maximum-minimum count. The latter output produces a high-level output pulse with a duration approximately adequate to one complete cycle of the clock when the counter overflows or underflows.