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CD4043 CMOS Quad 3-State RS Latch IC
₹25.00 Original price was: ₹25.00.₹20.00Current price is: ₹20.00. inc. GST
- CMOS Quad 3-State R/S Latch
- Number of Circuits:Â 1
- Logic Type:Â CMOS
- Logic Family:Â CD4000
- Polarity:Â Non-Inverting
- Number of Output Lines:Â 4
- High Level Output Current:Â – 4.2 mA
- Propagation Delay Time:Â 350 ns at 5 V, 175 ns at 10 V, 120 ns at 15 V
- Package:Â PDIP 16
- Supply Voltage Range:Â 3 to 15 V
- Operating Temperature Range:Â -55 C to 125 C
CD4043 designed quad cross-coupled 3-STATE CMOS NOR latches. That means it has four R-S latches, all of which are created using the CMOS NOR logical gate. All four latches share a same 3-STATE ENABLE input. Each latch in the IC has its own Q output as well as its own SET and RESET inputs. A single ENABLE input controls all of the Q outputs. The latch states are connected to the Q outputs via a logic “1” or high on the ENABLE input. The latch states are also disconnected from the Q outputs when the ENABLE input is set to logic “0” or low. As a result, an open circuit feature is created, allowing the outputs to be shared. In the meanwhile, this IC has a number of advantages, including good noise immunity, ESD protection, and great thermal overload protection. Meanwhile, the DC Supply Voltage Range (VDD) of the CD4043 is -0.5V to +18V.
An SR latch, also known as an SR Flip-Flop, is a logic circuit with two inputs (S and R) and two outputs (Q and Q’). The status of output Q determines the state of this latch. When Q is 1 (High), the latch is said to be SET, and when Q is 0 (Low), the latch is said to be RESET. Two cross-coupled NAND gates or two cross-coupled NOR gates are used to create an SR latch or flip flop.
Application
- Multiple bus storage
- Strobed register
- Four bits of independent storage with output enable
- General digital logic

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