CD4076 CMOS 4 Bit D Type Register IC

CD4076 designed as a four-bit register with three-state outputs that is made up of D-type flip-flops. To regulate the entry of data into the flip-flops, Data Disable inputs are provided. Data at the D inputs is fed into their corresponding flip-flops on the next positive transition of the clock input when both Data Disable inputs are low. Inputs for output disable are also available. When both Output Disable inputs are low, the load has access to the regular logic states of four outputs. A high logic level at either Output Disable input disables the outputs independently of the clock, and they have a high impedance. These 16 lead outline packages were used to make the CD4076BMS.

A D-type Latch/flip-flop is a clocked latch that comes with two stable states. A D-type latch has a one-clock-cycle delay in its input. Delay circuits are frequently produced by cascading multiple D-type flip-flops. This was then used in a variety of applications, such as digital television systems. D-type flip-flops are also known as D flip-flops or delay flip-flops..

Applications

• Function  as a digital building block for a wide variety of temporary data storage & processing devices such as SRAMs & DRAMs etc.

• Also Useful as Input or Output Port for Microprocessors