CD4085BE CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate IC
CD4082 Dual 4 Input AND Gate IC Original price was: ₹22.00.Current price is: ₹15.00. inc. GST
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CD4086 CMOS Expandable 4 Wide 2 Input AND OR INVERT Gate IC
CD4086 CMOS Expandable 4 Wide 2 Input AND OR INVERT Gate IC Original price was: ₹22.00.Current price is: ₹15.00. inc. GST

CD4085BE CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate IC

Original price was: ₹22.00.Current price is: ₹15.00. inc. GST

  • CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate
  • Number of Gates: 2
  • High Level Output Current: – 6.8 mA
  • Low Level Output Current: 6.8 mA
  • Propagation Delay Time: 90 ns
  • Number of Lines In/Out: 2 / 1
  • No. of Pins: 14
  • Logic IC Family: CD4000
  • Operating Temperature Range: -55°C to +125°C
  • Supply Voltage Range: 3V to 18V
  • Package: PDIP-14
Description

CD4085BE comprises Dual 2-Wide 2-Input AND-OR-INVERT Gate IC manufactured inside the single integrated circuit package.  The CD4085BE designed with complementary MOS (CMOS) transistors technology. It helps to achieve a wide power supply operating range, low power consumption, and high noise margin. This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and one 2-wide 3-input AND-OR-INVERT gate. The IC  also comes as smaller in size and offers much faster speed.  Thus makes it highly reliable in every kind of device.

It is perfect for AND-OR select gating, shift-right/shift-left registers, true/complement selection and mAND/OR/Exclusive-OR selection. CD4085BE Operates at a supply voltage of range between 3V to 18V. This IC designed for operation over the full military temperature range of -55°C to 125°C.All inputs come with protection circuits against static discharge and transient excess voltage

The CD4085B manufactured in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

AND-OR-Invert (AOI) logic and AOI gates designed as two-level compound (or complex) logic functions made up of the combination of 1 or more AND gates followed by a NOR gate. The construction of AOI cells is especially efficient using CMOS technology.  Where the entire number of transistor gates are often compared to an equivalent construction using NAND logic or NOR logic. The complement of AOI Logic is OR-AND-Invert (OAI) logic where the OR gates precede a NAND circuit.

 

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