D8251 Programmable Communications Interface IC

The 8251 is an industry-standard Universal Synchronous/Asynchronous Receiver/Transmitter (USART) for data connections with MCS-48, 80, 85, and iAPX 86, 88 microprocessor families. This programmable device is housed in a 28-pin DIP and is intended primarily for synchronous and asynchronous serial data transfer. The 8251A is a peripheral device that may be configured by the CPU to use almost any serial data transfer technology currently available (including IBM’s “bi-sync”).

The USART receives parallel-format data characters from the CPU and transforms them to a continuous serial data stream for transmission. It can receive serial data streams and transform them to parallel data characters for the CPU at the same time. When the USART can accept a new character for transmission or receives a character for the CPU, it sends a signal to the CPU. At any point, the CPU may read the whole state of the USART. Data transmission faults and control signals such as SYNDET and TxEMPTY are examples. Intel’s high-performance HMOS technology was used to make the chip.

The  Control logic in the IC  Interfaces the chip with MPU, determines the functions of the chip according to the control word in the control register & monitors the data flow. The Transmitter portion translates a parallel word from the processor into serial bits, which it then sends to a peripheral through the TxD line. It is divided into two registers:

The receiver portion, on the other hand, accepts serial bits from a peripheral. And then it turns them into a parallel word, which it then transmits to the P. It also has two registers.