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CD4099 8-Bit Addressable Latch IC
₹30.00 Original price was: ₹30.00.₹25.00Current price is: ₹25.00. inc. GST
- 8 Bit Addressable Latch
- Supply Voltage Range: 3 to 20V
- Input Current: ±10mA
- Power Dissipation : 200mW
- Quiescent Current Max. : 100µA
- Low level Output Voltage: 0.05V
- High-level Output Voltage Min.: 4.95V
- Low level Input Voltage Max.: 1.5V
- High level Input Voltage Min.: 3.5V
- Propagation Delay Time Max.: 450ns
- Package: DIP-16
CD4099 IC belongs to the CD4000 IC series. CD4099 deigned as an 8 – bit addressable latch with three address inputs (A0–A2), a lively low enable input (E), active high clear input (CL), a data input (D), and eight outputs (Q0–Q7). Data is entered into a specific bit in the latch when that bit addressed by the address inputs and therefore the enable (E) is LOW. Data entry inhibited when enabling pin (E) remains HIGH. All outputs switch to LOW when clear pin (CL) and enable pin (E) are HIGH. Channel demultiplexing occurs when clear (CL) is HIGH and enable (E) is LOW. The bit that addressed offers a lively HIGH output that follows the info input while all unaddressed bits remain LOW. The IC offers many features like low thermal dissipation, high noise immunity, and operative flexibility in terms of workability voltages.
A digital logic circuit called an addressable latch is used to store a bit of digital data or a digital state. When the clock input is high, addressable latching logic circuits are prone to capturing, or ‘latching,’ the logic level existing on the data line. If the data on the D line changes state when the clock pulse is high, for example, the output, Q, follows the input, D, in a D-type latching circuit. The last state of the D input is caught and held within the latch when the CLK input falls to logic 0.
Application
Multi-line decoders
A/D converters

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