Latch

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CD4044 CMOS Quad 3-State RS Latch IC

Original price was: ₹21.00.Current price is: ₹15.00. inc. GST
  • CMOS Quad 3-State RS Latch
  • Number of Circuits: 1
  • Logic Type: CMOS
  • Logic Family: CD4000
  • Polarity: Non-Inverting
  • Number of Input Lines/Output Lines: 8/4
  • High Level Output Current: - 4.2 mA
  • Propagation Delay Time: 350 ns at 5 V, 175 ns at 10 V, 120 ns at 15 V
  • Supply Voltage Range: 3 to 15V
  • Operating Temperature Range: - 55 C to + 125 C
  • Package: PDIP 16

CD4043 CMOS Quad 3-State RS Latch IC

Original price was: ₹25.00.Current price is: ₹20.00. inc. GST
  • CMOS Quad 3-State R/S Latch
  • Number of Circuits: 1
  • Logic Type: CMOS
  • Logic Family: CD4000
  • Polarity: Non-Inverting
  • Number of Output Lines: 4
  • High Level Output Current: - 4.2 mA
  • Propagation Delay Time: 350 ns at 5 V, 175 ns at 10 V, 120 ns at 15 V
  • Package: PDIP 16
  • Supply Voltage Range: 3 to 15 V
  • Operating Temperature Range: -55 C to 125 C

CD4042 Quad Clocked D Latch IC

Original price was: ₹24.00.Current price is: ₹18.00. inc. GST
  • Quad Clocked D Latch
  • Supply Voltage Range: 3 to 20V
  • Input Current: ±10mA
  • Power Dissipation: 200mW
  • Low level Output Voltage: 0.05V
  • High level Output Voltage Min.: 4.95V
  • Low level Input Voltage Max.: 1.5V
  • High level Input Voltage Min.: 3.5V
  • Propagation Delay Time Max.: 500ns
  • Package: DIP-16
  • High noise immunity 0.45 VDD (typ.)
  • Low power TTL compatibility Fan out of 2 driving 74L or 1 driving 74LS
  • Clock polarity control
  • Fully buffered data inputs
  • Q and Q outputs

74LS373 Octal D-Type Transparent Latch IC

Original price was: ₹25.00.Current price is: ₹15.00. inc. GST
  • Octal D-Type Transparent Latch
  • High-level input voltage: 2V
  • Low-level input voltage: 0.8V
  • High-level output voltage: 5.5V
  • High-level output current: -6.5mA
  • Input clamp voltage: -1.2V
  • Propagation delay time: 18ns
  • Supply voltage range: 4.75 to 5.25V
  • Package: DIP-20
  • Eight Latches in a Single Package
  • 3-State Outputs for Bus Interfacing
  • Hysteresis on Latch Enable
  • Edge-Triggered D-Type Inputs
  • Buffered Positive Edge-Triggered Clock
  • Hysteresis on Clock Input to Improve Noise Margin
  • Input Clamp Diodes Limit High-Speed Termination Effects