CD4043 designed quad cross-coupled 3-STATE CMOS NOR latches. That means it has four R-S latches, all of which are created using the CMOS NOR logical gate. All four latches share a same 3-STATE ENABLE input. Each latch in the IC has its own Q output as well as its own SET and RESET inputs. A single ENABLE input controls all of the Q outputs. The latch states are connected to the Q outputs via a logic “1” or high on the ENABLE input. The latch states are also disconnected from the Q outputs when the ENABLE input is set to logic “0” or low. As a result, an open circuit feature is created, allowing the outputs to be shared. In the meanwhile, this IC has a number of advantages, including good noise immunity, ESD protection, and great thermal overload protection. Meanwhile, the DC Supply Voltage Range (VDD) of the CD4043 is -0.5V to +18V.
An SR latch, also known as an SR Flip-Flop, is a logic circuit with two inputs (S and R) and two outputs (Q and Q’). The status of output Q determines the state of this latch. When Q is 1 (High), the latch is said to be SET, and when Q is 0 (Low), the latch is said to be RESET. Two cross-coupled NAND gates or two cross-coupled NOR gates are used to create an SR latch or flip flop.
Application
- Multiple bus storage
- Strobed register
- Four bits of independent storage with output enable
- General digital logic
Reviews
There are no reviews yet.