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CD4020 14 Stage Ripple-Carry Binary Counter IC
₹25.00 Original price was: ₹25.00.₹18.00Current price is: ₹18.00. inc. GST
- 14 Stage Ripple – Carry Binary Counter:
- Supply Voltage:Â 3 to 15V
- Input Current: ± 10 mA
- Power Dissipation:Â 200mW
- Low level Output Voltage Max.:Â 0.05V
- High level Output Voltage min.:Â 4.95V
- Low level Input Voltage Max.:Â 1.5V
- High level Input Voltage Min.:Â 3.5V
- Propagation Delay Time Max.:Â 360ns
- Package:Â DIP-16
- Medium-speed operation
- Fully static operation
- Buffered inputs and outputs
- 100% tested for quiescent current at 20 V
- Standardized, symmetrical output characteristics
- Fully static operation
- Common reset
The CD4020 is a ripple-carry binary counter that belongs to the CD4XXX IC family. All of the counter stages are master-slave reversals. On the negative transition of each clock pulse, the CD4020 counters advance one count. A logical “1” at the reset input, which is independent of the clock, resets the counters to zero. On the input-pulse line, Schmitt trigger action allows for infinite rise and fall times. Buffering is used on all inputs and outputs. The IC has a wide range of functions, including strong noise immunity, low thermal dissipation, and ESD protection. The usage of I/O clamping diodes protects each I/O pin of the IC from static damage. The IC’s output is always in TTL, making it simple to interface with other CMOS and TTL devices like MCUs and MPUs.
The CD4020 is available in sixteen-lead hermetic dual-in-line ceramic packaging (F3A suffix), sixteen-lead dual-in-line plastic packages (E suffix), sixteen-lead small-outline packages (NSR suffix), and sixteen-lead thin shrink small-outline packages (NSR suffix) (PW and PWR suffixes).
A bistable multivibrator circuit is used in a binary ripple counter to cause the count to advance or decrease when cache input is applied to the counter. The output terminals Q and Q are always logically opposite each other. When the Q output is logical 1 (SET), the output is logical 0. When the Q output is logical 0 (REST), the output is logical 1. By rigging at least two D-type flip flops, a rudimentary Binary ripple counter may be easily created.
Applications
- Frequency division
- Time delay circuit
- Control counter
- Timer

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