CD4033BE CMOS Decade Counter Divider IC

The CD4033BE defined as one of the most prominent CMOS Decade Counter/Divider used nowadays. It is designed as a 5-stage Johnson counter with outputs decoder. This output decoder converts to Johnson counter 7-segment display outputs and ripple blanking for driving one stage in a numerical display. It offers various advantages in display applications where low power dissipation is important. The Inputs common to both types are clock, reset and clock inhibit, common outputs are carried out and the seven decoded outputs (a, b, c, d, e, f, g).

Meanwhile, the signals peculiar to the CD4033B are ripple-blanking input and lamp test input, and ripple-blanking output. A high reset signal clears the decade counter to its zero counts. The counter also advanced one count at the positive clock signal transition if the clock inhibits signal is low. Counter advancement via the clock line inhibited when the CLOCK INHIBIT signal is HIGH. The counter inhibits signal used a negative edge clock if the clock line held high. Moreover, Antilock gating provided on johnso counter, thus ensuring a proper counting sequence. The Carry UT signal completes one cycle every 10 clock input cycle and used to clock succeeding decade directly in multi-decade cunting chains. The 7- decoded output(a,b,c,d,e,f,g) illuminate proper segment in even segment display device used for representing decimal number 0 t9. Thus 7-segment output gets high on selectin with CD4033BE.

Applications

• Decade counting 7 segment decimal display
• Frequency division 7 segment decimal display
• clock, watches, Timer
• Counter/display driver for master application
• Consumer Electronics, Clock & Timing