MEGA328P Atmel Microcontroller IC

The MEGA328P Atmel Microcontroller IC designed as an effectively low-power, high-performance CMOS 8/16-bit microcontroller. This microcontroller designed based on the Microchip AVR® enhanced RISC architecture. It comes with 16K bytes of in-system programmable non-volatile storage manufactured using Atmel’s high-density non-volatile memory technology. The device comes with 16 MIPS throughput at 16 Mhz at 2.7-5.5V operation. By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching one MIPS per MHz, allowing you to reduce power consumption versus processing speed.

In this Atmel microcontroller,  by combining a flexible 8-bit CPU with in-system programmable Flash on a monolithic chip. Thus Atmel ATMEGA128A becomes effectively powerful microcontroller. In order that it delivers a highly flexible and affordable solution to various embedded control applications. Moreover, the Atmel MEGA328P features 32 KB self-programming flash program memory, 2kB SRAM, 512B EEPROM, 8-channel 10-bit A/D converter. And a JTAG interface for on-chip debug, 23 general-purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte-oriented 2-wire Serial Interface, an SPI serial port. It also consists of a 6-channel 10-bit ADC (8 channels in TQFP and QFN/MLF packages), a programmable Watchdog Timer with internal Oscillator, and five software selectable power saving modes.

The Idle Mode stops the functioning of the CPU allowing the RAM, timer/counters, serial port, and interrupt system to continue their operation. Whereas, the Power-down mode saves the RAM contents but freezes the oscillator. Thereby disabling all other chip functions until the next external interrupt or hardware reset. These two features makes it suitable for battery operated applications. Whereas in Power-save mode, the asynchronous timer continues to run. Thus allowing the user to maintain a timer base while rest of  device is sleeping.