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CD4078BE CMOS 8-Input NOR OR Gate IC
₹23.00 Original price was: ₹23.00.₹15.00Current price is: ₹15.00. inc. GST
- CMOS 8-Input NOR/OR Gate
- Output Current: 6.8mA
- No. of Inputs: 8
- No. of Pins: 14
- Logic IC Family: CD4000
- Number of Gates: 1
- Propagation Delay Time: 300 ns
- Number of Lines In/Out: 8 / 2
- Operating Temperature Range: -55°C to +125°C
- Supply Voltage Range: 3V to 18V
- Package: PDIP-14
CD4078BE belong to the CD4XXX IC series. CD4078BE comprises 8-Input NOR OR Gate IC manufactured inside the single integrated circuit package. The CD4075BE designed with complementary MOS (CMOS) transistors technology. It helps to achieve a wide power supply operating range, low power consumption, and high noise margin.
Moreover, this IC allows design engineers to direct the implementation of the positive-logic 8-Input NOR and OR Gate IC and supplement the existing family of CMOS gates. CD4078BE features high noise immunity and static protection through clamping diodes. CD4078BE Operates at a supply voltage of range between 3V to 18V. This IC designed for operation over the full military temperature range of 0°C to 70°C. The IC CD4078BE comes as smaller in size and offers much faster speed which makes it highly reliable in every kind of device.
The CD4078BE types manufactured in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
A NOR gate designed as an OR gate followed by a NOT gate in a cascade model. The inclusive NOR (Not – OR) gate offers an output that is normally at logic level “1” . And only goes “LOW” to a logic level “0” when any of its inputs are at logic level “1”. The Logic NOR Gate reffered as the reverse or complementary form of the inclusive OR gate.
An OR gate designed as a logic gate that performs logical OR operation. A logical OR operation consists of a high output (1) if one or both the inputs to the gate remains high (1). In case, if neither input is high, a low output (0) results.

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